Can I use 3 sticks of memory??

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H1081Dan

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According to the tested memory page thats posted in this forum I can use 3 sticks of 256 mb kingston KVR400X64C25/256 modules. I hear on the rumor mill that the athlon 64 can only handle 2 modules at a time. I am looking for a super stable PC so would 3 be a bad idea?
 
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Originally posted by Bas
Maybe you want to read the AMD TechDoc's yourself?????
Click to expand...

I'm not trying to be argumentative, but I don't see anything in the following AMD doc that says you can't have 3 DIMMs operating at DDR 400:

http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24659.PDF

AMD Athlon? 64 Processor Data Sheet 24659 Rev 3.05 February 2004 page 12

? Unbuffered and registered DIMMs with a 64-bit data bus with optional 8 bits of Error Correcting
Code (ECC) in one of the following two configurations:
? Up to three unbuffered DIMMs according to the loading described in the BIOS and Kernel
Developer?s Guide for the AMD Athlon? 64 and AMD Opteron? Processors, order# 26094.
? Up to four registered DIMMs (note DDR400 not available on registered DIMMs)
? The controller provides programmable control of DRAM timing parameters to support the following
memory speeds:
? 100-MHz (DDR200) PC-1600 DIMMs
? 133-MHz (DDR266) PC-2100 DIMMs
? 166-MHz (DDR333) PC-2700 DIMMs
? 200-MHz (DDR400) PC-3200 DIMMs (unbuffered DIMMs only)

However, the Asus K8V Deluxe manual on page 2-12 indicates that 3 DIMM configurations will operate only at DDR 333. The Asus manual (linked below) is at odds with the MSI manual. Either MSI's manual is wrong or the MS-6702 can operate at DDR 400 with certain 3 DIMM configurations.

http://www.asus.com/support/downloa...1&m_id=1&f_name=e1421b_k8v_deluxe.pdf~zaqwedc

Does anyone have a link to an AMD doc that says 3 DIMMs can't operate at DDR 400?
 
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Here's the link I've seen referenced:

>>AMD Doc Link<<

Take a peek at section 2.4.2

I will admit to NOT trying it, but that statement about 2 DIMMS maximum seems pretty definitive. Perhaps it's in error, but if AMD sayeth, I believeth.

Gary
 
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Originally posted by GaryH
Here's the link I've seen referenced:

>>AMD Doc Link<<

Take a peek at section 2.4.2

I will admit to NOT trying it, but that statement about 2 DIMMS maximum seems pretty definitive. Perhaps it's in error, but if AMD sayeth, I believeth.

Gary
Click to expand...

Thanks for the link.

What is interesting is that the above link that GaryH provides is AMD document 24659 Rev 3.00 dated September 2003. The September 2003 version includes the following statement:

? 200-MHz (DDR400) PC-3200 DIMMs (unbuffered DIMMs only, two maximum)

However, the link I gave earlier in the thread is from Rev 3.05 of document 24659 dated February 2004. The February 2004 version is slightly different than the September 2003 version:

? 200-MHz (DDR400) PC-3200 DIMMs (unbuffered DIMMs only)

It appears that the new version of AMD document 24659 doesn't restrict DDR 400 to just two DIMMs.
 
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Except the new tech doc is probably for the new and improved "CG" stepping. Though I am not sure it is just speculation. I know that I do not have this CG stepping, though I am somewhat able to populate all three sockets.
 
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Looking a little closer at the differences between version 3.00 and 3.05 of AMD document 24659 I noticed the following:

Table 3 on page 16 of version 3.00 was removed from version 3.05. This table showed that 3 DIMM configurations could not operate at DDR 400. This table is similar to the tables included in Asus and Abit?s manuals that similarly showed that 3 DIMM configurations could not operate at DDR 400. It is likely that Asus and Abit wrote their manuals based on the now outdated version 3.00 table.

The revision history of version 3.05 indicates, in part:

Added 2T DRAM timing description to section 2.4.2.2. Added CLKIN jitter specification to Table 26. Clarified supported HT speeds in section 2.4.1.2. Moved DIMM speed/loading table out of this document. Removed other references to DIMM loading capabilities.

The new section on 2T DRAM timing states the following:

The use of 2T timing allows support of many DIMM combinations at the maximum DDR speeds listed in Table 1. The 2T timing feature causes commands and addresses to be driven for two clock cycles and qualified with an associated chip select on the second clock cycle, allowing an extra clock of setup to accommodate heavy DIMM loading (such as double-rank DIMMs). Refer to the BIOS and Kernel Developer?s Guide for the AMD Athlon?64 and AMD Opteron? Processors, order# 26094, for the DIMM combinations that require 2T timing to operate at the full DRAM speed. 2T timing is supported in CG and later silicon revisions. Refer to the AMD Athlon?64 Processor Power and Thermal Data Sheet, order #30430, for silicon revision determination.

It is possible that ?CG? revision chips can use 3 DIMMS at DDR 400.
 
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Originally posted by Bas
If you read the revision history of the last document, you find this:

Moved DIMM speed/loading table out of this
document. Removed other references to DIMM loading capabilities.
Click to expand...

Anyone????????? :noidea:
Click to expand...

I noticed that too. Since AMD said they "moved" the table I was trying to find it in other AMD documents but I didn't see it.

If the DIMM limitations still apply to pre "CG" revision die, I wonder why AMD removed all reference to these limitations from their documents.
 
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The CG version is supposed to have some memory-controller modifications.
But we will only know when the new CPU has been tested won't we?
 
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