adam.hamle158d02d9
New member
- Joined
- Jun 10, 2025
- Messages
- 1
Hi,
I have a brand new system with a MSI Meg Ace Z890 motherboard and the Intel 285k.
I have a 4TB Samsung 9100 Pro NVME drive installed in the Gen5 x4 M.2_1 slot which is directly connected to the CPU PCIe lanes (see attached block diagram).
The 9100 pro is capable of upwards of 14BGB/sec throughput but I'm only seeing 12GB/sec.
I've read the articles about the gen 5 NVME drives being throttled due to the Arrow Lake chiplet design, but I'm assuming this would impact drives connected via the PCH. My drive is directly connected to the CPU (Arrow Lake has 20 gen 5 PCIe lanes, I'm using 16 for the GPU and 4 for the 9100 pro).
I raised this with Intel and their response was the following:
The upstream memory read performance of the ARL S processor SOC tile root ports 13 and 14 (PCIe Lanes 1 to 16), configured as 1px16 or 2px8, may be affected by increased round-trip latencies during random upstream memory read operations. These latency variations are influenced by the specific workload and the capabilities of the PCIe endpoint device.
As a result, the observed performance could be attributed to the system configuration and/or SoC architecture. Given the nature of this issue, I recommend contacting the motherboard OEM for further assistance and guidance.
So it looks like Intel are pointing towards MSI for this problem - any thoughts on how to get this fixed? Thanks.
I have a brand new system with a MSI Meg Ace Z890 motherboard and the Intel 285k.
I have a 4TB Samsung 9100 Pro NVME drive installed in the Gen5 x4 M.2_1 slot which is directly connected to the CPU PCIe lanes (see attached block diagram).
The 9100 pro is capable of upwards of 14BGB/sec throughput but I'm only seeing 12GB/sec.
I've read the articles about the gen 5 NVME drives being throttled due to the Arrow Lake chiplet design, but I'm assuming this would impact drives connected via the PCH. My drive is directly connected to the CPU (Arrow Lake has 20 gen 5 PCIe lanes, I'm using 16 for the GPU and 4 for the 9100 pro).
I raised this with Intel and their response was the following:
The upstream memory read performance of the ARL S processor SOC tile root ports 13 and 14 (PCIe Lanes 1 to 16), configured as 1px16 or 2px8, may be affected by increased round-trip latencies during random upstream memory read operations. These latency variations are influenced by the specific workload and the capabilities of the PCIe endpoint device.
As a result, the observed performance could be attributed to the system configuration and/or SoC architecture. Given the nature of this issue, I recommend contacting the motherboard OEM for further assistance and guidance.
So it looks like Intel are pointing towards MSI for this problem - any thoughts on how to get this fixed? Thanks.