x99 Gaming 9 - PCIE Lane Utilization (Tri-SLI + m.2 + x8)

[zak.counides]

Just want to confirm that I am reading the image posted in here (https://forum-en.msi.com/index.php?action=dlattach;topic=251355.0;attach=20948;image) correctly before I pull the trigger on the new machine.

My current plan is to run 3x980 on PCIE 1,2, and 4, toss in a m.2 SSD to boot from, and a 10gpbs network card below that. After doing some research, it looks like the 980s will be content with only 8x lanes, so I am just wanting to make sure that everything will be online, and useable without any bandwidth limitations. (Except the m.2 obviously, but sadly it looks like the 10gigabit NIC is required for its purpose in life. So as long as the m.2 is useable for boot, I should be fine as I plan on tossing in 3xSSDs to run applications off of, and 4xHDD which will be used for archival/storage.)

PICE_1 - GTX 980 - Gen3 8x
PICE_2 - GTX 980 - Gen3 8x
PICE_4 - GTX 980 - Gen3 16x
m.2 - Crucial SSD - Gen2 2x
PICE_5 - 10Gigabit NIC - Gen3 8x

Any thoughts, or am I missing something in this build?

Edit: CPU would be a 5960x

 

[flobelix]

What cpu should be used?

 

[zak.counides]

Whoops, I did forget to mention that. i7-5960x

 

[flobelix]

PICE_1 - GTX 980 - Gen3 8x
PICE_2 - GTX 980 - Gen3 8x
PICE_4 - GTX 980 - Gen3 16x
m.2 - Crucial SSD - Gen2 2x
PICE_5 - 10Gigabit NIC - Gen3 8x

Edit: CPU would be a 5960x

Yes, that setup is possible if using a 5960X or 5930K (40 lanes). BUT it will only work if the ?M.2 PCH Strap? for [M.2 PCIE] is set in BIOS. Else the M.2 SSD will not utilize the chipset PCI-E bus at 2.0 X2 but use the cpu's PCI-E 3.0 interface at 3.0 X4 what disables PCI_E5.